Avaya Media Processing Server Series System (Software Release 2.1) Manual de usuario descargar pdf (Pagina 266)

Avaya Media Processing Server Series System Reference Manual

Page 266 # P0602477 Ver: 3.1.11

For example, in the illustration above, consider that the selected source for

REFCLK_A is the frame sync from TMS1/ DCC4. Clock driver b is enabled to drive

REFCLK_A and clock driver a is inhibited. Clock receivers c and d provide the

system REFCLKs to the input of the primary and secondary multiplexers where these

references are selected for the local TMS. The primary or secondary reference is used

to generate all the clocks for the TMS CT bus timing.

Multiple sources can be specified for both REFCLK_A and REFCLK_B in the

synclist section of the tms.cfg file. (See Synclist Configuration Section on page

119.) Clock monitoring and selection provides several prioritized layers of

redundancy so that even multiple failures are compensated for by switching to other

clock sources.

The VRC rear panel provides two BNC connectors (EXT CLK A and EXT CLK B)

for connection to external timing sources. These are typically provided by customer

supplied equipment available on site. If an external timing source is used, the

[SYNC_LISTS] section of the tms.cfg file is commented out and no local

clocking is used. The TMS automatically detects the presence of a clocking source on

either external input.

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Avaya Media Processing Server Series System (Software Release 2.1) Manual de usuario Pagina 266